Ascend Archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: (ASCEND) bi-polar violation and another telco issue

> Can anyone provide me with a decent description of what a 'bi-polar
> violation' is, and why it turns a PRI into a piece of crap that causes
> users to have a difficult time connecting and staying connected (that's
> when the D channel is up, we all know what happens when the D goes down).  

Here's what a bipolar violation is:

(I had a hard time finding this information myself, so I'm
determined to share it!)

On a T1, no voltage represents a zero bit. Either positive or negative
voltage represents a one bit. The use of both positive and negative
voltage is why it's called bipolar. The first one (mark) bit will be
indicated by positive voltage. The next one will be represented by
negative. The third will be positive, and so on.

A bipolar violation is defined as when there are two one bits in a
row are represented as positive voltage, or two one bits in a row
are represented as negative voltage. This is illegal and indicates
a problem, EXCEPT AS NOTED BELOW.

For any type of synchronous line, the boundaries between the bits on the
wire must be clearly marked. With interfaces like V.35, this is done
by using a clock signal seperate from the data signal. When the clock
pulses, that's a bit boundary. But on a T1, where you've only got two
wires going in each direction, there's only room to transmit one signal
in each direction. The clock must somehow be contained within the data.

Thus, the bit boundaires are defined as when the voltage transitions.
It could be from zero to positive, zero to negative, positive to
negative, or negative to positive. Any transition indicates a bit
boundary.

This usually works: between a 1 bit and a zero bit, the voltage
transitions from either positive or negative (the 1 bit) to no
voltage (the zero bit). Conversely, between a 0 bit and a 1 bit, the
opposite happens. And between two 1 bits, the voltage is going to
go from either positive or negative to the opposite.

The only problem is when there are two 0 bits in a row. Since they are
both represented as no voltage, there will be no transition between
them.

Now it turns out that if there are a few 0 bits in a row and we lose our
clock signal for a little while, until there is a 1 bit to provide us
with a transition, the line can still work. The had just better not be
too many in a row or we will be in danger or the recipient will be in
danger of losing synchronization with the sender.

There is one trick to make sure that there aren't excessive amounts of
consecutive 0 bits: force every eighth bit in the data stream to be a
1. That means that out of every 8 bits, we only have 7 left to stuff
data into and we've just lost 12.5% of the T1's bandwidth. This
translates into reducing each of the 24 channels from 64Kbps to
56Kbps.

We prefer not to do that!

There is another trick to make sure there aren't too many zeroes. It's
called Bipolar 8 Zero Substitution (B8ZS for short). Here's how:

Every time there are 8 zero bits in a row, we are going to introduce
some one bits into the data stream by substituting another bit pattern
for the 8 zeroes. This new bit pattern has ones in it to maintain the
clocking signal (fewer than 8 consecutive zero bits is acceptable to
transmit on the line). However, to let the receiver know that such a
substitution has occured, the transmitter will make two bipolar
violations ON PURPOSE.

When the receiver sees that special bit pattern with the two bipolar
violations in it, it knows that the original data stream must have
been 8 zeroes, and changes it back.

-Phil
++ Ascend Users Mailing List ++
To unsubscribe:	send unsubscribe to ascend-users-request@bungi.com
To get FAQ'd:	<http://www.nealis.net/ascend/faq>
References: